Extension modules • RAM
Module (32 KByte) •
This module offers a 32 kByte RAM extension for the Experimenting Board II, build from a 62256 memory chip and a 74HC373 for the address logic. It can also be used a smaller and cheaper memory chip (6264).
If you take a close at the schematic you will notice that the address and data lines seem to be completely mixed up. This doesn't matter since the data gets written and read through the same lines and this way the mixed up lines don't have an influence on the result. While programming you don't need to pay attention to this matter. The i.e. at addess 0100h written data can be read from the same address. It doesn't matter at which physical the data is located in the RAM module. Through this possibility to mix up the lines almost as you like to the layout can be keep very easy. You can even set this up on a hole grid erection with only a few bridges.
Writing into the RAM module works through the "MOVX @Ri,A" and "MOVX @DPTR,A" commands whereas the register (Ri = R0 or R1) resp. the data pointer register (DPTR) contains the address of the byte that will be written into the external RAM module and the data of the accumulator (A) will be written into the RAM module at this address.
Reading looks similar. With the "MOVX A,@Ri" and "MOVX A,@DPTR" commands the data at the address that is given in the Ri resp. DPTR will be read and copied into the accumulator.
It is an example program available to use with the RAM module. It reads the input signals of a port every millisecond for a time of 32.768 seconds and saves the results into the RAM module. These saved signals can be read from the RAM module at a later time and be given out to a port.
Data
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Suitable for Experimenting BoardII (Version 1.1 or higher, because \WR and \RD of port 0 are needed!)
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Attachable to extension portPort 0 and port 2 will be used.
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Adjustments at DIP-switchNo special adjustments necessary. XTAL 1 and XTAL 2 should be "ON" so the MC gets a tact signal.
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Power consumption~ 7 mA
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Circuit board / LayoutRelative simple layout. Optimized for set up on hole grid erection with only a few bridges.
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LimitationsPort pin 3.6 and 3.7 carry the \WR and \RD lines which are used for RAM activation. These lines are not allowed to be set to low-level through the software.
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Developed bySascha Dräger
Schematic
Schematic and Layout
For the schematic and layout plans you need the highly recommended schematic and layout editor EAGLE. A free english version can be downloaded at http://www.cadsoft.de/freeware.htm.
RAM Module (32 KByte) Schematic and layout
File size: around 11 KByte
Further downloads
Sample program
File size: around 5 KByte
Datasheet 62256
File size: around 144 KByte
Datasheet 6264
File size: around 239 KByte
